IBM unveils NanoStack, a 0.7-nanometer three-dimensional transistor design that stacks layers to fit nearly 100 billion transistors on a fingernail-sized die and promises up to 50% higher performance or 70% better energy efficiency.Jay Gambetta says the architecture reinvents chip building and could accelerate smartphones, laptops and data center artificial intelligence processors; IBM lists Rapidus as a partner but has not named foundries for volume production.Competitors
TSMC and
Intel are pursuing alternate sub-2-nanometer paths, engineers warn thermal management and transistor switch-off remain major hurdles, and
IBM says it expects production within five years if yields and manufacturing agreements materialize.